Resistance change memories, such as magnetic random access memories have the advantages of lower static power and smaller cell size than static random access memories (SRAM), and the like. Thus, an attempt to use an SRAM in place of a resistance change memory as a cache memory is made. In particular, a spin-transfer-torque magnetic random access memory (STT-MRAM) can make the write current relatively small and thus is highly applicable to a cache memory.
However, the memory cell (resistance change element) of the resistance change memory is generally a two-terminal element and has the same path for write current and read current. Accordingly, the write current decreases and a current difference (margin) between the write current and the read current becomes small, with the result that a read disturbance that a write operation is performed by mistake during the read operation will occur at high probability. If the read current is decreased further to avoid the mistaken write operation, a period of time for amplifying the small read current by a sense amplifier is increased and the read speed is decreased.